The present invention relates generally to integrated charge pump circuits, and more particularly to improvements therein which reduce power consumption and which reduce the amount of integrated circuit chip area required.
Use of an on-chip charge pump in an integrated circuit operational amplifier to bootstrap an input stage tail current source thereof provides an increased rail-to-rail common mode input voltage range of the operational amplifier. The boosted output voltage produced by the charge pump needs to have a low ripple voltage because the ripple voltage causes noise in the tail current which then propagates to the output of the operational amplifier. It is desirable that the on-chip charge pump consume as little current and power as possible.
FIG. 1 shows a low-ripple, on-chip current mode charge pump that has been used in the assignee's OPA365 operational amplifier, which is believed to be the closest prior art. In FIG. 1, an integrated circuit 1A includes a current mode charge pump circuit 1B which produces a boosted output voltage Vout. Vout is applied to bias a current source that functions as the tail current source of the input stage of an operational amplifier (not shown). Current mode charge pump 1B includes an operational amplifier 4 that functions as a feedback amplifier. The (+) input of feedback amplifier 4 is connected by a conductor 6 to the (+) terminal of a voltage source 5, the (−) terminal of which is connected to the positive rail voltage source VDD, whereby a reference voltage Vref is produced on conductor 6. Voltage source 5 may produce a constant voltage of about 1 volt, and can be implemented in various ways, for example by means of the gate-to-source voltage VGS of a P-channel MOS transistor and a circuit including a resistor and a current source (not shown). (Since the voltage source 5 must operate at voltages higher than VDD, the source of the P-channel transistor would be coupled through the resistor and the current source to Vout, with the gate and drain of the P-channel transistor being connected to VDD.) The (−) input of feedback amplifier 4 is connected to conductor 3, on which the charge pump output voltage Vout is produced. The output of feedback amplifier 4 is connected by conductor 8 to the control terminals of two essentially identical controlled current sources 7 and 9 which produce a “discharge current” I0 and a “recharge current” I1, respectively. The upper terminal of each of controlled current sources 7 and 9 is connected to VDD.
The lower terminal of discharge current source 7 is connected by conductor 12 to one terminal of each of switches S1 and S5. The other terminal of switch S1 is connected by conductor 13 to the “bottom” plate of a flying capacitor C1 and to one terminal of a switch S2, the other terminal of which is connected to a conductor 2, on which a supply voltage such as VSS is applied. The “upper” plate of flying capacitor C1 is connected by conductor 14 to one terminal of each of switches S3 and S4. The other terminal of switch S3 is connected by conductor 15 to the lower terminal of recharge current source 9. The other terminal of switch S4 is connected to charge pump output conductor 3. The lower terminal of recharge current source 9 is connected by conductor 15 to one terminal of switch S7. The other terminal of switch S7 is connected by conductor 18 to the top plate of a second flying capacitor C2 and to one terminal of a switch S8, the other terminal of which is connected to Vout conductor 3. The bottom plate of flying capacitor C2 is connected by conductor 17 to one terminal of each of switches S5 and S6. The other terminal of switch S6 is connected to VSS conductor 2. The other terminal of switch S5 is connected to conductor 12. A voltage VDISCHARGE on conductor 12 is equal to either the bottom plate voltage Vc1 of flying capacitor C1 or the bottom plate voltage Vc2 of flying capacitor C2.
An internal bypass capacitor C0 is connected between Vout conductor 3 and VDD. A load 19 which draws a load current IL is connected between Vout conductor 3 and VSS, and can be either internal or external to integrated circuit chip 1A. Typically, an external oscillator 10A generates a phase signal F1 and its logical complement F2. Phase signal F1 controls switches S1, S4, S6, and S7 and phase signal F2 controls switches S2, S3, S5, and S8.
Flying capacitors C1 and C2 are alternately recharged and alternately discharged into Vout conductor 3 so as to produce an essentially constant value of output voltage Vout. In the example of FIG. 1, Vout is used to control the tail current of an operational amplifier (not shown) wherein the gate-to-source voltage VGS of a MOS transistor (not shown) which functions as a tail current source needs to be equal to a reference voltage Vref that is roughly 1 volt above the positive rail voltage VDD and is generated by means of voltage source 5. The various switches of charge pump 1B typically are implemented by means of MOS transistors and are controlled such that one of the flying capacitors C1 and C2 is always connected by a switch to the output Vout except during short switching transitions. The value of the discharge current I0 and the recharge current I1 is determined by the feedback loop including amplifier 4, with Vout as its inverting input and the voltage Vref on conductor 6 as its non-inverting input.
If various components, including controlled current sources I0, I1 and operational amplifier 14 are ideal, then the discharging current I0 and the recharging current I1 are equal to the load current IL, and Vout is essentially constant (except for a relatively small ripple voltage component) during the flying capacitor discharge process. This is because the feedback loop including feedback amplifier 4 and controlled current sources 7 and 9 adjusts I0 and I1 so as to cause Vout to be precisely equal to Vref as a result of each of flying capacitors C1 and C2 being alternately connected to charge pump output conductor 3 and being discharged to load 19 by discharge current I0 from controlled current source 7, while the other flying capacitor is being recharged by the same amount of current I1 from controlled current source 9.
Typically, external oscillator 10A is used to cause the “swapping” of flying capacitors C1 and C2 to occur at a frequency just above the bandwidth of the above mentioned operational amplifier (not shown) that includes input tail current source 26. The “swapping” of flying capacitors C1 and C2 refers to alternately switching their functions from being recharged by I1 to being discharged by I0.
However, the foregoing technique is not optimal from a power efficiency standpoint because the flying capacitor swapping frequency needs to be based on worst-case values of flying capacitors C1 and C2, VDD, and load current IL. During the switching transitions between phases F1 and F2, charge pump 1 consumes energy being used to recharge the switch gate capacitances of MOS transistors (not shown) which are typically used to implement switches S1, S2, . . . S8 and to recharge parasitic capacitances Cp1 and Cp2 associated with flying capacitors C1 and C2.
Consequently, the power consumption of charge pump circuitry 1B is directly proportional to the frequency of phase signals F1 and F2 and is inversely proportional to the capacitance of flying capacitors C1 and C2.
In existing products including prior art charge pump 1B of FIG. 1, switching between pulses of phase signals F1 and F2 is typically controlled by external oscillator 10A. The frequency of external oscillator 10A typically has to be chosen for the worst-case combination of power supply values, charge pump load current value, and high resistances and capacitances of on-chip frequency-setting resistors and capacitors which typically have at least a 15% variation in value due to process parameter variation.
The bottom plate voltage Vc1 or Vc2 of the flying capacitor presently being discharged by discharge current I0 increases as the parasitic capacitance Cp1 or Cp2 associated with that flying capacitor is charged up, but the bottom plate voltage Vc1 or Vc2 cannot exceed VDD. The worst case capacitance value of flying capacitors C1 and C2 is selected in accordance with the worst case values of load current IL, the charge pump supply voltage, and Vout.
As a practical matter, the flying capacitor values must be at least twice the values required for charge pump operation with nominal values of the various circuit parameters. Every time the flying capacitor functions are effectively swapped, some energy is lost or wasted because it is necessary to recharge one of the parasitic capacitors Cp1 or Cp2. The current necessary to recharge parasitic capacitors Cp1 or Cp2 is in effect lost. Therefore, it is desirable that the capacitor swapping frequency be as small as possible, and it also is desirable to reduce integrated circuit chip area and cost by making the flying capacitors as small as possible, and it also is desirable to decrease the parasitic components Cp1 and Cp2 of the flying capacitors by making their capacitances as small as possible.
Thus, there is an unmet need for an improved integrated circuit charge pump circuit which operates more efficiently than the closest prior art charge pump circuits having comparable low noise performance.
There also is an unmet need for an improved integrated circuit charge pump circuit which requires less integrated circuit chip area than the closest prior art charge pump circuits having comparable low noise performance.